Passes
ALAPPlacePass
dataclass
ALAPPlacePass()
Bases: Pass
flowchart TD
bloqade.lanes.passes.ALAPPlacePass[ALAPPlacePass]
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ALAP scheduling optimization for the place dialect.
Same pipeline as ASAPPlacePass but uses ALAP (As-Late-As-Possible)
dependency scheduling. Deferring single-qubit gates to their latest
valid layer reduces the qubit footprint of early CZ-anchored
StaticPlacement regions, lowering atom-move overhead compared to ASAP.
debug.Info statements are stripped at the start of this pass (same
reason as ASAPPlacePass).
ASAPPlacePass
dataclass
ASAPPlacePass()
Bases: Pass
flowchart TD
bloqade.lanes.passes.ASAPPlacePass[ASAPPlacePass]
click bloqade.lanes.passes.ASAPPlacePass href "" "bloqade.lanes.passes.ASAPPlacePass"
ASAP scheduling optimization for the place dialect.
Merges all pure-gate placements (R, Rz, CZ), reorders gates by ASAP dependency scheduling, then fuses adjacent compatible gates.
debug.Info statements are stripped at the start of this pass.
ASAP scheduling cannot reorder across opaque debug nodes, so they must
be removed before the merge/reorder/fuse sequence. Use
SequentialPlacePass if debug statements must be preserved.
SequentialPlacePass
dataclass
SequentialPlacePass()
Bases: Pass
flowchart TD
bloqade.lanes.passes.SequentialPlacePass[SequentialPlacePass]
click bloqade.lanes.passes.SequentialPlacePass href "" "bloqade.lanes.passes.SequentialPlacePass"
Preserve gate order; merge only adjacent single-qubit-gate placements (R, Rz).
CZ placements remain isolated, preserving the original program order. This is the default behavior.
TransversalRewritePass
dataclass
TransversalRewritePass(
*,
transversal_location_map: Callable[..., Any],
rewrite_logical_initialize: bool = True
)
Bases: Pass
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bloqade.lanes.passes.TransversalRewritePass[TransversalRewritePass]
click bloqade.lanes.passes.TransversalRewritePass href "" "bloqade.lanes.passes.TransversalRewritePass"
Rewrite from logical to physical addresses.