Skip to content
The Neutral Atom SDK
Qubit address
Initializing search
bloqade
Home
Bloqade Digital
Digital Tutorials
Bloqade Analog
Analog Tutorials
qBook
API Reference
Blog
QuEra Computing
The Neutral Atom SDK
bloqade
Home
Home
Installation
Background
Manifesto
Quick Start
Quick Start
Bloqade Digital
Bloqade Digital
Bloqade Analog
Bloqade Analog
Contributing
Bloqade Digital
Bloqade Digital
Domain specific languages
Domain specific languages
QASM2
SQUIN
Stim
Compilation process
Simulation
Simulation
Simulation devices
Tasks
Interoperability with Cirq
Interoperability with Cirq
Converting cirq to squin
Converting squin to Cirq
Digital Tutorials
Digital Tutorials
Tutorials
Tutorials
Circuits with Bloqade
Parallelism of Static Circuits
QASM2 examples
QASM2 examples
Quantum Fourier Transform
GHZ State Preparation with Parallelism
Pauli Exponentiation for Quantum Simulation
Repeat Until Success with STAR Gadget
QAOA
Squin dialect examples
Squin dialect examples
Deutsch-Jozsa Algorithm
GHZ State Preparation with Squin
TSIM examples
TSIM examples
Logical magic state distillation
Gemini Logical dialect examples
Gemini Logical dialect examples
Simulator Demo for Gemini Logical
Integration with other SDKs
Integration with other SDKs
GHZ State preparation and noise
Bloqade Analog
Bloqade Analog
Migration Guide to Bloqade Analog
Quickstart
Background
Gotchas
Contributing
Contributing
Ask a Question
Design Philosophy and Architecture
Community Slack
Design Philosophy and Architecture
Reporting a Documentation Issue
Requesting new Features
Providing Feedback
Reporting a Bug
Builder
Builder
Builder Overview
Build Workflow
Hardware Reference
Analog Tutorials
qBook
API Reference
API Reference
Bloqade Digital
Bloqade Digital
Device
Task
Types
Analysis
Analysis
Address
Address
Analysis
Impls
Lattice
Fidelity
Fidelity
Analysis
Impls
Measure id
Measure id
Analysis
Impls
Lattice
Validation
Validation
Simple nocloning
Simple nocloning
Validation
Cirq utils
Cirq utils
Lineprog
Lowering
Parallelize
Emit
Emit
Base
Gate
Noise
Qubit
Noise
Noise
Conflict graph
Model
Transform
Native
Native
Dialects
Dialects
Gate
Gate
Stmts
Stdlib
Stdlib
Broadcast
Simple
Upstream
Upstream
Squin2native
Pyqrack
Pyqrack
Base
Device
Native
Reg
Target
Task
Noise
Noise
Native
Qasm2
Qasm2
Core
Glob
Parallel
Uop
Squin
Squin
Qubit
Gate
Gate
Gate
Noise
Noise
Native
Qasm2
Qasm2
Glob
Groups
Noise
Parallel
Types
Analysis
Analysis
Validation
Validation
Analysis
Dialects
Dialects
Glob
Indexing
Inline
Parallel
Core
Core
Address
Stmts
Expr
Expr
Stmts
Noise
Noise
Fidelity
Model
Stmts
Uop
Uop
Schedule
Stmts
Emit
Emit
Base
Gate
Main
Target
Impls
Impls
Noise
Parse
Parse
Ast
Build
Lowering
Parser
Print
Visitor
Passes
Passes
Fold
Glob
Lift qubits
Noise
Parallel
Py2qasm
Qasm2py
Unroll if
Rewrite
Rewrite
Desugar
Glob
Insert qubits
Native gates
Parallel to glob
Parallel to uop
Register
Uop to parallel
Noise
Noise
Heuristic noise
Remove noise
Qbraid
Qbraid
Lowering
Schema
Simulation result
Target
Qubit
Qubit
Stmts
Analysis
Analysis
Address impl
Stdlib
Stdlib
Broadcast
Simple
Record idx helper
Record idx helper
Stmts
Rewrite
Rewrite
Passes
Passes
Aggressive unroll
Callgraph
Canonicalize ilist
Rules
Rules
Split ifs
Squin
Squin
Groups
Analysis
Analysis
Schedule
Fidelity
Fidelity
Impls
Validation
Validation
Simple nocloning
Simple nocloning
Impls
Gate
Gate
Stmts
Noise
Noise
Stmts
Passes
Passes
Qasm2 gate func to squin
Qasm2 to squin
Rewrite
Rewrite
U3 to clifford
non clifford to U3
Remove dangling qubits
Wrap analysis
Qasm2
Qasm2
Id to squin
Noise to squin
Qasm2 direct to squin
Qasm2 modified to squin
Stdlib
Stdlib
Broadcast
Broadcast
Gate
Noise
Simple
Simple
Gate
Noise
Stim
Stim
Circuit
Groups
Analysis
Analysis
From squin validation
From squin validation
Analysis
Dialects
Dialects
Auxiliary
Auxiliary
Emit
Interp
Lowering
Types
Stmts
Stmts
Annotate
Const
Collapse
Collapse
Emit str
Stmts
Stmts
Measure
Pp measure
Reset
Gate
Gate
Emit
Stmts
Stmts
Base
Clifford 1q
Clifford 2q
Control 2q
Non clifford
Pp
Noise
Noise
Emit
Stmts
Emit
Emit
Impls
Stim str
Parse
Parse
Lowering
Passes
Passes
Flatten
Simplify ifs
Squin to stim
Rewrite
Rewrite
Get record util
Ifs handling
Ifs to stim partial
Py constant to stim
Qubit to stim
Resolve get rec idx
Set detector partial
Set observable partial
Squin measure
Squin noise
Util
Upstream
Upstream
From squin
Tsim
Tsim
Circuit
Visual
Visual
Animation
Animation
Animate
Base
Gate event
Runtime
Runtime
Aod
Atoms
Ppoly
Qpustate
Utils
Bloqade Lanes
Bloqade Lanes
Gemini
Gemini
Post processing
Star
Common
Common
Dialects
Dialects
Qubit
Qubit
Stmts
Impl
Impl
Duplicate address
Qubit address
Qubit address
Table of contents
qubit_address
Terminal measure
Validation
Validation
Duplicate address
New at
Terminal measure
Device
Device
Simulator
Logical
Logical
Device
Future
Result
Task
Logical
Logical
Group
Dialects
Dialects
Operations
Operations
Stmts
Impl
Impl
Measure id
Measurement
Typeinfer
Rewrite
Rewrite
Initialize
Qubit count
Remove postprocessing
Steane transversal
Stdlib
Stdlib
Broadcast
Post processing
Star
Validation
Validation
Clifford
Clifford
Analysis
Impls
Measurement
Measurement
Analysis
Impls
Lanes
Lanes
Compile
Cudaq integration
Logical mvp
Metrics
Noise model
Passes
Prelude
Steane defaults
Transform
Types
Upstream
Utils
Analysis
Analysis
Atom
Atom
Analysis
Atom state data
Impl
Lattice
Layout
Layout
Analysis
Placement
Placement
Analysis
Lattice
Strategy
Arch
Arch
Geometry
Metrics
Path
Spec
Build
Build
Blueprint
Imperative
Topology
Word factory
Gemini
Gemini
Logical
Logical
Rewrite
Spec
Stmts
Upstream
Validation
Physical
Physical
Spec
Gemini full
Gemini full
Spec
Generic full
Generic full
Spec
Bytecode
Bytecode
Decode
Encode
Encoding
Exceptions
Grid
Word
Dialects
Dialects
Move
Place
Stack move
Heuristics
Heuristics
Move synthesis
Simple layout
Logical
Logical
Layout
Placement
Physical
Physical
Layout
Movement
No return
Nohome
Placement
Receding horizon
Target generator
Pipeline
Pipeline
Base
Logical
Physical
Rewrite
Rewrite
Circuit2place
Fuse gates
Measure lower
Move2stack move
Place2move
Remove debug
Resolve pinned
Split static placement
Squin2stim
Stack move2move
Stackify
State
Transversal
Move2squin
Move2squin
Base
Gates
Noise
Reorder static placement
Reorder static placement
Alap
Asap
Common
Rule
Validation
Validation
Address
Visualize
Visualize
App
Arch
Artist
Debug
Entropy tree
Entropy tree
Cli
Controller
Renderer
State
Tracer
Bloqade Analog
Bloqade Analog
Atom arrangement
Constants
Factory
Migrate
Serialize
Builder
Builder
Args
Assign
Coupling
Drive
Field
Parallelize
Pragmas
Route
Sequence builder
Spatial
Start
Typing
Waveform
Backend
Backend
Bloqade
Braket
Quera
Parse
Parse
Builder
Stream
Trait
Compiler
Compiler
Analysis
Analysis
Common
Common
Assignment scan
Check slices
Is constant
Is hyperfine
Scan channels
Scan variables
Hardware
Hardware
Channels
Lattice
Piecewise constant
Piecewise linear
Python
Python
Waveform
Passes
Passes
Emulator
Hardware
Hardware
Components
Define
Units
Rewrite
Rewrite
Common
Common
Add padding
Assign to literal
Assign variables
Canonicalize
Flatten
Python
Python
Waveform
Emulate
Emulate
Sparse operator
Ir
Ir
Atom type
Emulator
Space
State vector
Ir
Ir
Analog circuit
Scalar
Control
Control
Field
Pulse
Sequence
Waveform
Traits
Traits
Append
Canonicalize
Hash
Slice
Location
Location
Bravais
Location
Routine
Routine
Base
Bloqade
Braket
Params
Quera
Submission
Submission
Base
Braket
Load config
Mock
Quera
Ir
Ir
Braket
Capabilities
Parallel
Task results
Task specification
Task
Task
Base
Batch
Bloqade
Braket
Braket simulator
Exclusive
Quera
Blog
Blog
Archive
Archive
2025
2023
QuEra Computing
Table of contents
qubit_address
Qubit address
Back to top